Methods have already been suggested for simple encapsulation of components to protect sensitive conductive structures on a chip from environmental influences.
It is possible, for example, to seal the space between the chip edge and the carrier substrate with an underfiller and to sputter a metal layer onto the component. The disadvantage of this method is that that the conductive structures (in particular acoustic converters) on the chip must be protected from the underfiller, for example with a plastic cap, and expensive processing steps are needed for this.
It was proposed in DE 198 06 818 A, for example, that the components be soldered onto a carrier in a flip chip arrangement and then be covered with a film, such as laminate film, which seals the components tightly with the carrier between the components.
In additional variants, it is also proposed that these films be further sealed hermetically by applying a metal layer over the film, and that this metallization be thickened for example by electroplating. In this case, freestanding bumps are involved, which are not supported by a filling compound. Because the mechanical connection between the carrier substrate and the chip comes about exclusively through the laminate film and the bumps, the bumps in particular endure the shear and/or tension stresses that occur in the chip under mechanical effects.
In particular as a result of differing coefficients of expansion of the laminate film or seals and the bumps, under strong and abrupt temperature changes, the bumps are exposed to mechanical strains that can result in cracks, breaks, and even in the bumps breaking off.